ece124: add missing day (thanks alyn!)

docs/1b/ece124.md

@@ -58,6 +58,34 @@ $$\overline{A+B}$$
 
 <img src="https://upload.wikimedia.org/wikipedia/commons/c/c6/NOR_ANSI_Labelled.svg" width=200>(Source: Wikimedia Commons)</img>
 
+The **XOR** operator returns true if and only if the inputs are not equal to each other.
+
+$$A\oplus B$$
+
+<img src="https://upload.wikimedia.org/wikipedia/commons/1/17/XOR_ANSI_Labelled.svg" width=200>(Source: Wikimedia Commons)</img>
+
+The **XNOR** operator is equivalent to **NOT XOR**.
+
+$$\overline{A\oplus B}$$
+
+<img src="https://upload.wikimedia.org/wikipedia/commons/b/b8/XNOR_ANSI_Labelled.svg" width=200>(Source: Wikimedia Commons)</img>
+
+### Buffer gates
+
+The **buffer** gate returns the input without any changes, and is usually used for adding delays into circuits.
+
+<img src="https://upload.wikimedia.org/wikipedia/commons/7/75/Digital_buffer.svg" width=200>(Source: Wikimedia Commons</img>
+
+A **tri-state buffer** gate controls whether the input affects the circuit at all. When the controlling input is off, the input is disconnected from the rest of the system, leaving the output of the buffer as a third state **Z** (high impedance).
+
+One example of a tri-state buffer is a switch.
+
+<img src="https://upload.wikimedia.org/wikipedia/commons/c/c0/Tristate_buffer.svg" width=400>(Source: Wikimedia Commons)</img>
+
+!!! example
+    Tri-state buffers are often used to implement **select inputs** or **multiplexers** — setting the mux switch in one direction or another only allows signals from one input to pass through.
+    <img src="https://upload.wikimedia.org/wikipedia/commons/1/16/Multiplexer2.svg" width=400>(Source: Wikimedia Commons)</img>
+
 ### NAND/NOR completeness
 
 NAND and NOR are **universal gates** — some combination of them can form any other logic gate. Constructions of other gates using only these gates are called **NAND-NAND realisations** or **NOR-NOR realisations**.
@@ -209,7 +237,23 @@ A transistor has three inputs/outputs:
 
 A **negative logic** transistor uses a NOT bubble to represent that it is closed while the voltage is **below** a threshold.
 
-<imgg src="https://upload.wikimedia.org/wikipedia/commons/c/c4/IGFET_P-Ch_Enh_Labelled_simplified.svg" width=200>(Source: Wikimedia Commons)</img>
+<img src="https://upload.wikimedia.org/wikipedia/commons/c/c4/IGFET_P-Ch_Enh_Labelled_simplified.svg" width=200>(Source: Wikimedia Commons)</img>
+
+## Hardware
+
+!!! definition
+    - A **programmable logic gate**
+    - A **programmable logic array**
+    - **Programmable array logic**
+
+### FPGAs
+
+A **field-programmable gate array** (FPGA) is hardware that does not come with factory-fabricated AND and OR gates, requiring the user to set them up themselves. It contains:
+
+- input/output pads
+- routing channels (to connect with physical wires and switches)
+- logic blocks (that are user-programmed to behave like gates)
+    - lookup tables (LUTs) inside the logic gates, which are a small amount of memory
 
 ## VHDL