eifueo/docs/2a/ece240.md

# ECE 240: Electronic Circuits

## Diodes

A **diode** is a two-terminal device that only allows current to flow in the direction of the arrow.

<img src="https://upload.wikimedia.org/wikipedia/commons/b/b4/Diode_symbol.svg" width=300>(Source: Wikimedia Commons)</img>

The current across a diode is, where $I_s$ is a forced saturation current, $V$ is the voltage drop across it, and $V_T$ is the **thermal voltage** such that $V_T=\frac{kT}{q}$, where $T$ is the temperature, $k$ is the Boltzmann constant, and $q$ is the charge of an electron:

$$I=I_s\left(e^{V/V_T}-1\right)$$

!!! tip
    - $V_T\approx\pu{25 mV}$ at 20°C
    - $V_T\approx\pu{20 mV}$ at 25°C

A diode is open when current is flowing reverse the desired direction, resulting in zero current, until the voltage drop becomes so great that it reaches the **breakdown voltage** $V_B$. Otherwise, the above current formula is followed.

<img src="https://upload.wikimedia.org/wikipedia/commons/2/2a/Diode_current_wiki.png" width=500>(Source: Wikimedia Commons)</img>

Diodes are commonly used in **rectifier circuits** — circuits that convert AC to DC.

By preventing negative voltage, a relatively constant positive DC voltage is obtained. The slight dip between each hill is known as **ripple** $\Delta V$.

<img src="https://upload.wikimedia.org/wikipedia/en/8/8b/Reservoircapidealised.gif" width=500>(Source: Wikimedia Commons)</img>

In a simple series RC circuit, across a diode, Where $R_LC>>\frac 1 \omega$, and $f=\frac{\omega}{2\pi}$:

$$\Delta V\approx \frac{I_\text{load}}{2fC}\approx\frac{V_0}{2fR_LC}$$

### Zener diodes

A Zener diode is a calibrated diode with a known breakdown voltage, $V_B$. If the voltage across the diode would be greater than $V_B$, it is **capped at $V_B$.**

<img src="https://upload.wikimedia.org/wikipedia/commons/9/92/Zener_diode_symbol-2.svg" width=200>(Source: Wikimedia Commons)</img>

## Voltage/current biasing

Solving for current for each element in a series returns a negative linear line and other non-linear lines.

- the linear line is the **load line**, which represents the possible solutions to the circuit when it is loaded
- Depending on the base current $I_s$, the diode or transistor will be **biased** toward one of the curves, and the voltage and current will settle on one of the intersections, or **bias points**.

<img src="https://upload.wikimedia.org/wikipedia/commons/2/27/BJT_CE_load_line.svg" width=600>(Source: Wikimedia Commons)</img>

- To bias current, as $R\to\infty$ (or, in practical terms, $R>>diode$), the slope of the load line $\to 0$, which results in a constant current.
- To bias voltage, as $R\to 0$, the slope of the load line $\to\infty$, which results in a constant voltage.

!!! example
    <img src="https://miro.medium.com/v2/resize:fit:432/1*mijJgpHdt7DDmrPsb7tOcg.png" width=200 />
    
    The current across the resistor and the diode is the same:
    
    \begin{align*}
    i_D&=\frac{V_s}{R} \\
    i_D&\approx I_se^{V_D/V_T}
    \end{align*}

If a diode is put in series with AC and DC voltage sources $V_d(t)$ and $V_D$:

\begin{align*}
i_D(t)&=I_se^{(V_D+V_d(t))/V_T} \\
&=\underbrace{I_se^{V_D/V_T}}_\text{bias current}\ \underbrace{e^{V_d(t)/V_T}}_\text{$\approx 1+\frac{V_d}{V_T}$} \\
&=I_D\left(1+\frac{V_d}{V_T}\right) \\
&=\underbrace{I_D}_\text{large signal = bias = DC}+\underbrace{I_D\frac{V_d(t)}{V_T}}_\text{small signal = AC}
\end{align*}

Diodes may act as resistors, depending on the bias current. They may exhibit a **differential resistance**:
$$r_d=\left(\frac{\partial i_D}{\partial v_D}\right)^{-1} = \frac{V_T}{I_D}$$

!!! example
    Thus from the previous sequence:
    
    $$i_D(t)=I_D+\frac{1}{r_d}V_d(t)$$

### Signal analysis

1. Analyse DC signals
  - assume blocking capacitors are open circuits
  - turn off AC sources
2. Analyse AC signals
  - assume blocking capacitors are shorts
  - turn off DC sources
  - replace diode with effective resistor (the differential resistor)

!!! tip
    Most $R$s in the circuit can be assumed to be significantly greater than $r_d$, so $r_d$ can be removed in series or $R$ can be removed in parallel.

!!! warning
    Oftentimes, turning off a DC source to nowhere is actually a short to ground.

## MOSFETs

A MOSFET is a transistor. Current flows from the drain to the source, and only if voltage is applied to the gate.

<img src="https://upload.wikimedia.org/wikipedia/commons/6/69/Mosfet_saturation.svg" width=500>(Source: Wikimedia Commons)</img>

<img src="https://upload.wikimedia.org/wikipedia/commons/9/91/Transistor_Simple_Circuit_Diagram_with_NPN_Labels.svg" width=300>(Source: Wikimedia Commons)</img>

In strictly DC, current passes the gate if the gate voltage is greater than the threshold voltage $V_G>V_t$. The difference between the two is known as the **overdrive voltage** $V_{ov}$:

$$V_{ov}=V_G-V_t$$

At a small $V_{DS}$, or in AC, the slope of $I_D$ to $V_{DS}$ is proportional to $V_G$. The **channel transconductance** $g_{DS}$ represents this slope, which is constant based on the **transconductance parameter** of the device.

$$\frac{I_D}{V_{DS}}=g_{DS}=k_nV_{ov}$$

Before the saturation region, the current grows exponentially:

$$\boxed{I_s=k_n(V_{ov}-\tfrac 1 2V_{DS})V_{DS}}$$

Afterward, it remains constant, based on the overdrive voltage:

$$\boxed{I_s=\frac 1 2k_nV_{ov}^2}$$

### Common-source amplifiers

<img src="https://upload.wikimedia.org/wikipedia/commons/4/4f/N-channel_JFET_common_source.svg" width=200>(Source: Wikimedia Commons)</img>

Where $V_{out}=V_{DS}$:

<img src="https://media.cheggcdn.com/media/b65/b65d59bd-ac35-4d28-b811-0ad1b5cf5bb6/phpCBbhn6" width=700 />

$|V_{ds}|>|V_{gs}|$ indicates AC voltage gain.

The gain can be modelled with Ohm's law:

$$V_{DS}=V_{DD}-I_DR_D=V_{DD}-\frac 1 2k_n(V_{GS}-V_t)R_D$$

At a certain gate voltage:

\begin{align*}
A_V&=\frac{\partial V_{DS}}{\partial V_{GS}} \\
&=-g_{DS}R_D
\end{align*}

### Small signal analysis

The current from the drain to the source is equal to:

$$i_D=g_mV_{gs}$$

For small signals, a transistor is equivalent to, where $r_0=\frac{1}{\lambda I_D}=\frac{V_A}{I_D}$:

<img src="https://i.stack.imgur.com/EZK7K.png" width=600 />

It can be assumed that the differential resistance is always significantly smaller than any other external resistance: $r_o << R_d$.

To solve for the output resistance of the amplifier, turn off all sources and take the Thevenin resistance $R_{DS}$.

### Common-drain amplifiers / source followers

The input resistance of common amplifiers is infinity.

<img src="https://upload.wikimedia.org/wikipedia/commons/3/30/N-channel_JFET_source_follower.svg" width=200>(Source: Wikimedia Commons)</img>

As $V_{gs}$ is not necessarily zero, dependent sources must be left in when solving for output resistance, and so a small test source at the point of interest is required.

### Common-gate amplifiers

These can be represented by either the T-model or pi-model. The gate of the transistor is grounded.

$$
A_{VO}=g_mR_d \\
G_V=\frac{V_o}{V_{sig}}=g_mR_d\left(\frac{1}{1+g_mR_{sig}}\right)
$$

<img src="https://upload.wikimedia.org/wikipedia/commons/9/99/Common_Gate.svg" width=200 />

<img src="https://upload.wikimedia.org/wikipedia/commons/a/a9/Common_gate_output_resistance.PNG" width=400 />

### Differential pairs

These are used at the input of opamps.

In **differential mode,** assuming $Q_1=Q_2$:

$V_{in}^+=-V_{in}^-=\frac{V_d}{2}$, so the current going down from both gates is equal $i_{gs1}=-i_{gs2}$. This means that node before $R_E$ is effectively ground, so the circuit can be split into two common source circuits.

$$G_D=\frac{V_o^--V_o^+}{V_d}=\frac{R_{C1}g_m}{1}=-\frac{-R_{C1}}{r_m}$$

<img src="https://upload.wikimedia.org/wikipedia/commons/3/3a/Differential_amplifier_long-tailed_pair.svg" width=300 />

In **common mode**:

$V_{in}^+=V_{in}^-$

$$G_{CM}=-\frac{R_D}{r_m+R_S+2R_C}$$

The **common-mode rejection ratio** is:

$$\frac{G_D}{G_{CM}}=1+\frac{2R_C}{r_m+R_s}$$

## MOSFET biasing

To bias a MOSFET:

- the transistor must be on: $V_{GS}>V_t$
- the transistor must be saturated $V_{DS} > (V_{GS}-V_t)$

$$V_{GS}=V_G-R_EI_D$$

This is a negative feedback loop that forces a constant $I_D$.

<img src="https://i.stack.imgur.com/Yxslx.png" width=300 />

With two DC supplies ($-V_{EE}, V_{DD}$), having an $R_G$ results in:

$$I_D=\frac{-V_{EE}}{R_S}-\frac{V_{GS}}{R_S}$$

## PMOS transistors

These have current flowing from the source to the drain. It is effectively equal to an NMOS at all points but with its polarity reversed.

\begin{align*}
\tag{triode}I_D&=k_p\left(|V_{ov}|-\frac 1 2V_{SD}\right)V_{SD} \\
\tag{saturation}I_D&=\frac 1 2 k_p(V_{SG}-|V_{tp}|)^2
\end{align*}

### Frequency dependence

A **parasitic capacitor** from the gate to the source of an NMOS limits the bandwidth (gain). These represent physical limitations of electrodes. At the output, the current through the capacitor can be neglected. At the input, the current through the capacitor dominates.